Welcome to FPGAworld Conference 2018 in

Stockholm 18 September and Copenhagen 20 September

The FPGAworld Conference is an international forum for researchers, engineers, teachers, students and hackers. It covers topics such as complex analog/digital/software FPGA SoC systems, FPGA/ASIC based products, educational & industrial cases and more. The academic & industrial tracks at FPGAworld, meals, premises, administration etc. is paid for by industry sponsors and exhibitors.

Download programs

Keynote Speaker, Stockholm and Copenhagen

Keynote speaker: Pieter J. Hazewindus, Synopsys, Mountain View, CA

Title: Advanced Verification and Debug for Large and Complex FPGA Designs

Abstract: The FPGA industry is in a period of rapid change. There has been a significant growth in size and complexity of FPGAs with each new generation.  This has given rise to several challenges to FPGA design which are now needing a more ASIC “like” design methodology.  We survey the implications for designers implementing FPGAs, IP designers, as well as the tools supporting the FPGA designs.
With the introduction of FinFET technology-based FPGAs, single-FPGA design sizes have taken a big leap, while the maximum operating frequencies have increased, and the power consumption has decreased dramatically. FPGAs have become more feasible as replacements for ASICs, and as stepping stones towards eventual ASIC implementations. The scale of integration challenges traditional testing methods, such as simulation. More complex clocking schemes require enhanced verification methodologies. And RTL debug of a multi-million gate FPGA design in reasonable time necessitates novel strategies.

Pieter Hazewindus leads the development of software solutions for the implementation of FPGA designs as well as ASIC prototyping on FPGAs at Synopsys. He is responsible for the Synplify Pro and Premier family of products, which have provided synthesis support for FPGA vendors since 1994. Prior to Synopsys, he held both managerial and software developer positions at Synplicity, Cogit Corporation, and Mentor Graphics. Hazewindus holds a Ph.D. in Computer Science from the California Institute of Technology and an M.S. in Mathematics from the Eindhoven University of Technology. More; https://www.linkedin.com/in/graham-copperwheat-5991755/

Keynote Speakers, Stockholm

Keynote speaker: Graham Copperwheat –  Intel PSG located in UK.

Title: FPGA – The Multifunction Accelerator of ChoicePGA

Abstract: Recently, we’re living in an increasingly smart and connected world, a world that is generating increasing amounts of data and driven to find new ways to extract value from this data. A world that needs technology solutions that can not only meet today’s demands but also tomorrows. FPGAs are stepping up to meet this challenge by writing the next chapter in the story of their evolution – FPGA as a reconfigurable multifunction accelerator. What are the characteristics of this new chapter, what are the strategies the FPGA industry is deploying to address the demand?

More about Graham Copperwheat see: https://www.linkedin.com/in/graham-copperwheat-5991755/

Tutorials

Flyover Cabling Solutions for High Performance Interconnect for FPGAs (Stockholm)

Open for registration

Time: 13:45-14:45
Two compulsory registrations: send e-mail to Kevin.Burt@samtec.com and registration on the FPGAworld (max 12 persons).

As FPGA speeds increase to 56/112 Gbps PAM4, and the number of transceivers increase, so do the system design challenges. Signal integrity, thermal and packaging considerations place extreme constraints on the entire path out of the FPGA.
Traditional PCB routings are limited by the material resulting in shorter traces or more expensive exotic materials and layout challenges getting all the 56/112 G signals routed. As a result, the Interconnect Industry has created flyover cable solutions to enable these high bandwidth, high density links. These flyover solutions enable improved Signal integrity, low system power, and high performance, high density FPGA connections by taking the high speed signals off board and into low loss cables.
In this tutorial, you will learn the challenges of using traditional PCB layout techniques as well as the advantages of copper and optical cables as well as the system advantages that they enable.”

Sponsors

  • Intel
  • Elektronik Expo
  • DTU, Denmark (Technical University of Denmark)
  • Aktuel Elektronik, Denmark
  • Elektroniktidningen
  • ÅF

Exhibitors and Presenters

Copenhagen and Stockholm

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