Welcome to FPGAworld Conference 2015 in

Stockholm 8 September and Copenhagen 10 September

The Conference is an international forum for researchers (ACM), engineers, teachers and students/hackers.  Complex heterogeneous SW/HW embedded systems, products, education&industrial cases and more based on FPGA technology. FPGAworld sponsor the academic&industrial tracks, lunches, premises, administrations etc. from sponsors and exhibitors.


Keynote Speakers 2015 Copenhagen, Professor Vincent Mooney III, Georgia Institute of Technology, Atlanta, USA

Title:  Hardware Security and FPGAs: Strategies and Counterattacks

Recent highly publicized security attacks on businesses and governments have heightened the awareness of hardware vulnerability to malicious attacks.  FPGA technology offers a unique strategy not available to application-specific non-programmable hardware: reconfiguration.  This talk will give an overview of recent results in hardware security including an approach based on hardware signatures.  The ability of hardware reconfiguration to protect run-time hardware and software highlights the advantages of FPGAs.

Keynote Speakers 2015 Stockholm, Professor Ahmed Hemani, Dept. of Electronics and Embedded Systems, School of ICT, KTH, Sweden

Title: Next Generation Massively Parallel VLSI Architectures and Design Methods

ITRS for the mobile category has challenged the VLSI Design community to come up with solutions by 2020 to provide 1000X improvement in performance with 120% increase in power budget and no increase in the design team size to cope with a 10X increase in design complexity. We propose a solution based on Coarse Grain Reconfigurable Fabric for computation and storage called DRRA – Dynamically Reconfigurable Resource Array. This fabric provides a near ASIC performance and yet retains programmability. This fabric enables dataflow graphs along with their control to be implemented in arbitrary degree of parallelism in a true hardware fashion. The DRRA fabric also comes with a novel System-level to GDSII design flow based on a concept called SiLego. SiLego is based on a grid based design and use of large grain building blocks called SiLego instead of the prevalent standard cells. The SiLego blocks snap fit to compose a GDSII macro and provide a predictable micro-architecture level physical design target to empower true high-level and system-level syntheses.

Our sponsors

  • ACM
  • DTU
  • Elektroniktidningen
  • Aktuell Elektronik
  • ÅF
  • Exostiv Labs

Sponsors, Exhibitors and Product Presenters

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