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| Altera Announces Industry’s First 40-nm FPGAs |
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Enabling designers to achieve new levels of integration and innovation, Altera today announced the industry’s first 40-nm FPGAs and HardCopy® ASICs. The Stratix® IV FPGAs and HardCopy IV ASICs, both with transceivers options, provide unprecedented densities, performance and low-power leadership. The Stratix IV family has up to 680K logic elements (LEs), 2X bigger than Altera’s Stratix III family, currently the largest FPGAs on the market. The HardCopy IV ASIC family offers equivalent densities as the Stratix IV devices and features up to 13.3 million gates. Altera® 40-nm devices meet the diverse high-end application needs in a large number of markets such as wireless and wireline communications, military, broadcast and ASIC prototyping.
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| Stratix III FPGAs Support SGMII on LVDS I/Os |
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Altera Corporation today announced its Stratix® III FPGAs support Serial Gigabit Media Independent Interface (SGMII) on its LVDS I/Os. Offering interface speeds of 1.25 Gbps and meeting SGMII’s stringent jitter performance requirements, Stratix III LVDS I/Os support triple-speed Ethernet (10/100/1000 Mbps) interfaces without transceivers. Stratix III FPGAs are the industry’s first programmable logic devices able to support Gigabit Ethernet SGMII on LVDS pins, offering lower costs, lower power and more interfaces per device.
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| Synplicity Introduces System Designer |
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Synplicity® today introduced System Designer™, a device-independent intellectual property (IP) configuration and system-level assembly environment that has been added to Synplicity’s Synplify Pro® and Synplify® Premier FPGA design implementation tools. The System Designer™ capability allows users to select, configure and assemble internal and third-party IP delivered in the IP-XACT format, integrate that IP and then easily implement it into a variety of FPGA vendor devices, including those from Actel, Altera, Lattice Semiconductor and Xilinx. The new tool flow provides FPGA designers, using IP and system-level blocks, with an extremely productive path to implementing complex systems in FPGAs.
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| ARM Joins Synplicity's ReadyIP Program |
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ARM and Synplicity, a leading supplier of innovative IC design and verification solutions, today announced the availability of ARM IP through Synplicity's ReadyIP Program. The ReadyIP program facilitates a vendor-independent design flow using Synplicity's industry standard FPGA synthesis and system design environments, giving designers easy and secure access to the ARM Cortex-M1 FPGA processor for quick evaluation, free of charge.
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| Actel Offers New Low-power FPGAS for 99 Cents |
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Directly addressing design requirements for programmable solutions that meet ever-tightening power and cost budgets, Actel Corporation today announced the addition of two new members to its award-winning IGLOO and successful ProASIC3
field-programmable gate array (FPGA) families starting at just 99 cents. Comparable in density to 128 macrocell complex programmable logic device
(CPLD) offerings, the new 15,000-gate devices offer power consumption as low as 5 microwatts (5µW), 10 times less static power than more expensive CPLDs.
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